共找到 19 條與 膜集成電路 相關(guān)的標(biāo)準(zhǔn),共 2 頁(yè)
Semiconductor Device Integrated Circuits Part 20: General Specifications for Film Integrated Circuits and Hybrid Film Integrated Circuits Part 1: Internal Visual Inspection Requirements
Hybrid integrated circuit direct current/direct current (DC/DC) converter
Semiconductor devices—Integrated circuits—Part 21:Sectional specification for film integrated circuits and hybrid film integrated circuits on the basis of the qualification approval procedures
Semiconductor devices—Integrated circuits—Part 21-1:Blank detail specification for film integrated circuits and hybrid film integrated circuits on the basis of the qualification approval procedures
本標(biāo)準(zhǔn)規(guī)定了薄膜集成電路用氧化鋁陶瓷基片的要求、測(cè)試方法、檢驗(yàn)規(guī)則標(biāo)志、包裝.運(yùn)輸和貯存。 本標(biāo)準(zhǔn)適用于薄膜集成電路用氧化鋁陶瓷基片(以下簡(jiǎn)稱(chēng)“基片>的生產(chǎn)和采購(gòu),采用薄膜工藝的片式元件用氧化館陶瓷基片也可參照使用。
Alumina ceramic substrates for thin film integrated circuits
本標(biāo)準(zhǔn)規(guī)定了薄膜集成電路用氧化鋁陶瓷基片的結(jié)構(gòu)尺寸、技術(shù)要求、試驗(yàn)方法、檢驗(yàn)規(guī)則、標(biāo)志、包裝、運(yùn)輸、貯存。 本標(biāo)準(zhǔn)適用于薄膜集成電路用氧化鋁陶瓷基片(以下簡(jiǎn)稱(chēng)基片)。
Alumina ceramic substrates for thin film integratedcircuits
本標(biāo)準(zhǔn)規(guī)定了厚膜集成電路用氧化鋁陶瓷基片的結(jié)構(gòu)尺寸、技術(shù)要求、試驗(yàn)方法、檢驗(yàn)規(guī)則、標(biāo)志、包裝、運(yùn)輸、貯存。 本標(biāo)準(zhǔn)適用于厚膜集成電路用氧化鋁陶瓷基片,片狀元件用氧化鋁陶瓷基片亦可參照使用。(以下簡(jiǎn)稱(chēng)基片)。
Alumina ceramic substrates for thick film integratedcircuits
Objective: Recommendation ITU-T Z.109 defines a unified modeling language (UML) profile that maps to SDL-2010 semantics so that UML is able to be used in combination with the ITU-T Specification and Description Language. Appendix I includes an (informative) Example language specification for a concrete grammar and its mapping to the UML profile.
Specification and Description Language – Unified modeling language profile for SDL-2010 (Study Group 17)
This part of IEC 62258 has been developed to facilitate the production, supply and use of semiconductor die products, including: ? wafers; ? singulated bare die; ? die and wafers with attached connection structures; ? minimally or partially encapsulated die and wafers. This part of IEC 62258 determines the information required to facilitate the use of thermal data and models for simulation of the thermal behaviour and verification of the correct functionality of electronic systems that include bare semiconductor die, with or without connection structures, and/or minimally packaged semiconductor die. It is intended to assist all those involved in the supply chain for die devices to comply with the requirements of IEC 62258-1 and IEC 62258-2.
Semiconductor die products - Part 6: Requirements for information concerning thermal simulation
The effects of silver migration are short circuiting or reduction in insulation resistance. It is evidenced by staining or dicoloration between the cathode and anode conductive traces. Accelerated testing may be accomplished by increasing the voltage over the specified voltages. (A typical starting point would be 5Vdc 50mA).1.1 This test method is used to determine the susceptibility of a membrane switch to the migration of the silver between circuit traces under dc voltage potential.1.2 Silver migration will occur when special conditions of moisture and electrical energy are present.
Standard Test Method for Silver Migration for Membrane Switch Circuitry
1.1 This test method is used to determine the susceptibility of a membrane switch to the migration of the silver between circuit traces under dc voltage potential.1.2 Silver migration will occur when special conditions of moisture and electrical energy are present.
Standard Test Method for Silver Migration for Membrane Switch Circuitry
1.1 This test method is used to determine the susceptibility of a membrane switch to the migration of the silver between circuit traces under dc voltage potential.1.2 Silver migration will occur when special conditions of moisture and electrical energy are present.
Standard Test Method for Silver Migration for Membrane Switch Circuitry
General specification for Lx band Solid-state pulse power modules
The ad hoc team choose to use the round robin approach to quantitatively measure the . effects of each variable at several levels. The round robin was developed and executed as a joint effort to minimize disagreements and maximize accuracy. The Steam Aging Round Robin was developed and approved by June 1989 (see Appendix A).
Glass Transition Temperature of Organic Films - TMA Method
IPC-TR-464 was originally published in April of 1984. This Technical Report was developed to meet the growing need for a standard method of evaluating the solderability retention capability of printed circuit parts during inventory storage. The report indicated that a 1-4 hour aging procedure was in'adequate to assure the level of acceptable solderability required by the industry. A 20-24 hour aging times was recommended. Since the initial publications of IPC-TR-464, additional research has taken place on accelerated aging; better leadltermination coatings are being used to meet aging requirements imposed by the industry. In 1986 the Accelerated Aging Task Group of the IPC was reactivated to . Evaluate the most recent research to determine if the aging period could be shorted, and still provide the appropriate information on solderability retention. This addendum to IPC-TR-464 published December 1987 represents the results of the task group study.
Glass Transition Temperature of Organic Films - DMA Method
本規(guī)范規(guī)定了厚膜集成電路HM0005(HM0225)視放負(fù)載電路的鑒定和質(zhì)量評(píng)定的全部?jī)?nèi)容。
Detail specification for electronic components--Case rated silicon rectifier diode for Type 2CZ57
Also covers partly-completed film integrated circuits and hybrid film integrated circuits, both active and passive, supplied to customers for subsequent processing, does not cover printed circuit boards but is applicable to above film circuits which may
Semiconductor devices - Intergrated circuits. Part 20: Generic specification for film integrated circuits and hybrid film intergrated circuits
Specification for metal packages of thick-film and thin-film integrated circuits
Miorocrystal glass substrates for use in thick film integrated circuits
Copyright ?2007-2024 ANTPEDIA, All Rights Reserved
京ICP備07018254號(hào) 京公網(wǎng)安備1101085018 電信與信息服務(wù)業(yè)務(wù)經(jīng)營(yíng)許可證:京ICP證110310號(hào)
頁(yè)面更新時(shí)間: 2024-11-25 21:17